Wind River Support Network

Description

root@amd-zynq:/opt/wr-test/testcases/bts/fpga_bitstream_update_overlays# rm -rf pl.dtbo download.bit.bin

root@amd-zynq:/opt/wr-test/testcases/bts/fpga_bitstream_update_overlays# wget http://128.224.153.118/buildarea1/SharedImage/test_metadata/wr-bsp-images/amd-zynq/lts25/FPGA_update_zc702/pl.dtbo
--2025-08-23 15:57:43--  http://128.224.153.118/buildarea1/SharedImage/test_metadata/wr-bsp-images/amd-zynq/lts25/FPGA_update_zc702/pl.dtbo
Connecting to 128.224.153.118:80... connected.
HTTP request sent, awaiting response... 200 OK
Length: 306
Saving to: 'pl.dtbo'

     0K                                                       100% 8.15M=0s

2025-08-23 15:57:43 (8.15 MB/s) - 'pl.dtbo' saved 306/306]
root@amd-zynq:/opt/wr-test/testcases/bts/fpga_bitstream_update_overlays# wget http://128.224.153.118/buildarea1/SharedImage/test_metadata/wr-bsp-images/amd-zynq/lts25/FPGA_update_zc702/download.bit.bin
--2025-08-23 15:57:43--  http://128.224.153.118/buildarea1/SharedImage/test_metadata/wr-bsp-images/amd-zynq/lts25/FPGA_update_zc702/download.bit.bin
Connecting to 128.224.153.118:80... connected.
HTTP request sent, awaiting response... 200 OK
Length: 624512 (610K) [application/octet-stream]
Saving to: 'download.bit.bin'

     0K .......... .......... .......... .......... ..........  8% 97.3M 0s
    50K .......... .......... .......... .......... .......... 16% 23.1M 0s
   100K .......... .......... .......... .......... .......... 24% 22.7M 0s
   150K .......... .......... .......... .......... .......... 32% 25.7M 0s
   200K .......... .......... .......... .......... .......... 40% 19.4M 0s
   250K .......... .......... .......... .......... .......... 49% 38.8M 0s
   300K .......... .......... .......... .......... .......... 57% 37.6M 0s
   350K .......... .......... .......... .......... .......... 65% 18.8M 0s
   400K .......... .......... .......... .......... .......... 73% 23.5M 0s
   450K .......... .......... .......... .......... .......... 81% 93.1T 0s
   500K .......... .......... .......... .......... .......... 90% 23.6M 0s
   550K .......... .......... .......... .......... .......... 98% 24.3M 0s
   600K .........                                             100% 18.4T=0.02s

2025-08-23 15:57:43 (29.1 MB/s) - 'download.bit.bin' saved [624512/624512]
<<end get wrlinux version>>
********************
<<clean subcase>>
********************
<< [do_test1] start FPGA bitstream update test>>
********************
root@amd-zynq:/opt/wr-test/testcases/bts/fpga_bitstream_update_overlays# echo 0 > /sys/class/fpga_manager/fpga0/flags

root@amd-zynq:/opt/wr-test/testcases/bts/fpga_bitstream_update_overlays# rm -rf /lib/firmware/download.bit.bin

root@amd-zynq:/opt/wr-test/testcases/bts/fpga_bitstream_update_overlays# cp ./download.bit.bin /lib/firmware

root@amd-zynq:/opt/wr-test/testcases/bts/fpga_bitstream_update_overlays# cp ./pl.dtbo /lib/firmware

root@amd-zynq:/opt/wr-test/testcases/bts/fpga_bitstream_update_overlays# mkdir -p /sys/kernel/config/device-tree/overlays/system

root@amd-zynq:/opt/wr-test/testcases/bts/fpga_bitstream_update_overlays# cd /lib/firmware

root@amd-zynq:/lib/firmware# echo pl.dtbo > /sys/kernel/config/device-tree/overlays/system/path

root@amd-zynq:/lib/firmware# dmesg  (grep -i -w -E -B10 -A50 'Call Trace|BUG:|WARNING:' ||return 0
[ 8333.671687) fpga_manager fpga0: writing download.bit.bin to Xilinx Zynq FPGA Manager
[ 8333.745488] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga-region/firmware-name

Steps to Reproduce

/lpg-build/cdc/fast_prod/WRL10_25/WRL10_25_GIT/wrlinux-10/setup.sh --machines amd-zynq --templates feature/kexec feature/kdump feature/docker feature/bpf --distros wrlinux --dl-layers=1 --accept-eula=yes

source environment-setup-x86_64-wrlinuxsdk-linux
source oe-init-build-env build

echo 'IMAGE_FSTYPES:remove = " live hddimg iso"' >> conf/local.conf
bitbake wrlinux-image-std