HomeDefectsLIN1024-35387
Fixed

LIN1024-35387 : Security Advisory - linux - CVE-2026-98919

Created: Oct 23, 2026    Updated: Oct 27, 2026
Resolved Date: Oct 23, 2026
Found In Version: 10.24.33.2
Fix Version: 10.24.33.5
Severity: Standard
Applicable for: Wind River Linux LTS 24
Component/s: Kernel

Description

In the Linux kernel, the following vulnerability has been resolved:  drm/xe: harden adjust_idledly() against divide-by-zero and overflow  adjust_idledly() has several corner-case issues flagged during review:    1. If xe_gt_clock_init() failed to recognise the crystal clock,      gt->info.timestamp_base is 0, which makes idledly_units_ps also 0.      The subsequent DIV_ROUND_CLOSEST(..., idledly_units_ps) is then a      divide-by-zero and panics the kernel.    2. The tick-to-ns conversions are done in u32:         idledly * idledly_units_ps, (maxcnt - 1) * 1000      Both overflow u32 before DIV_ROUND_CLOSEST() sees them.    3. If IDLE_WAIT_TIME reads back as 0, maxcnt evaluates to 0 and      the maxcnt - 1 clamp wraps to 0xFFFFFFFF in u32.    4. The register only stores whole ticks, so the clamped ns value has      to be converted to ticks and back. DIV_ROUND_CLOSEST() can round      that conversion up past maxcnt:         maxcnt = 640 ns, one tick = 666664 ps         clamp:        maxcnt - 1        = 639 ns        ns -> ticks:  639000 / 666664   = 0.958 -> rounds to 1 tick        tick -> ns:    1 * 666664 / 1000 = 667 ns       667 ns is programmed into RING_IDLEDLY, but 667 >= maxcnt (640),      so xe_gt_WARN_ON() fires again on every subsequent init.  Return early if timestamp_base is 0 (the unknown-crystal path). Do the conversions in u64 via the *_ULL() helpers so they cannot wrap. Clamp with a floor (DIV_ROUND_DOWN_ULL) so the programmed delay stays strictly below maxcnt, and guard the maxcnt == 0 case with a zero delay while still writing RING_IDLEDLY so INHIBIT_SWITCH_UNTIL_PREEMPTED is cleared.  v2: Drop the redundant warn on the timestamp_base == 0 path;     xe_gt_clock_init() already warns on an unrecognised crystal clock.     Keep the early return to avoid the divide-by-zero. - Vinay  v3: Field-mask the RING_IDLEDLY write with REG_FIELD_PREP(IDLE_DELAY, ...)     instead of writing the raw tick count, which could clobber     INHIBIT_SWITCH_UNTIL_PREEMPTED and reserved bits. Split the     inhibit-switch clear from the maxcnt clamp so a set inhibit bit no     longer forces a needless delay overwrite when the delay itself is     already valid. Use gt_to_xe(gt) instead of gt_to_xe(hwe->gt).  (cherry picked from commit d864065ea25e9d12897c175de9176ce46677e176)