Wind River Support Network

Description

 root@marvell-cn10xxx:/opt/wr-test# PATH=$PATH:/opt/ltp/testcases/bin/
root@marvell-cn10xxx:/opt/wr-test# pty03
tst_kconfig.c:87: TINFO: Parsing kernel config '/proc/config.gz'
tst_test.c:1709: TINFO: LTP version: 20240129
tst_test.c:1593: TINFO: Timeout per run is 0h 50m 30s
pty03.c:108: TINFO: Creating PTY with SLIP line discipline
/usr/src/debug/ltp/20240129/include/tst_fuzzy_sync.h:484: TINFO: Minimum sampling period ended
/usr/src/debug/ltp/20240129/include/tst_fuzzy_sync.h:307: TINFO: loop = 20, delay_bias = 0
/usr/src/debug/ltp/20240129/include/tst_fuzzy_sync.h:295: TINFO: start_a - start_b: { avg =   183ns, avg_dev =    40ns, dev_ratio = 0.22 }
/usr/src/debug/ltp/20240129/include/tst_fuzzy_sync.h:295: TINFO: end_a - start_a  : { avg = 114476480ns, avg_dev = 5910508ns, dev_ratio = 0.05 }
/usr/src/debug/ltp/20240129/include/tst_fuzzy_sync.h:295: TINFO: end_b - start_b  : { avg = 10394ns, avg_dev =   196ns, dev_ratio = 0.02 }
/usr/src/debug/ltp/20240129/include/tst_fuzzy_sync.h:295: TINFO: end_a - end_b    : { avg = 114466272ns, avg_dev = 5910516ns, dev_ratio = 0.05 }
/usr/src/debug/ltp/20240129/include/tst_fuzzy_sync.h:295: TINFO: spins            : { avg = 39358924  , avg_dev = 2033906  , dev_ratio = 0.05 }
/usr/src/debug/ltp/20240129/include/tst_fuzzy_sync.h:494: TINFO: Reached deviation ratios < 0.10, introducing randomness
/usr/src/debug/ltp/20240129/include/tst_fuzzy_sync.h:497: TINFO: Delay range is [-3377, 41650816]
/usr/src/debug/ltp/20240129/include/tst_fuzzy_sync.h:307: TINFO: loop = 28, delay_bias = 0
/usr/src/debug/ltp/20240129/include/tst_fuzzy_sync.h:295: TINFO: start_a - start_b: { avg =   274ns, avg_dev =    25ns, dev_ratio = 0.09 }
/usr/src/debug/ltp/20240129/include/tst_fuzzy_sync.h:295: TINFO: end_a - start_a  : { avg = 121130736ns, avg_dev = 7066813ns, dev_ratio = 0.06 }
/usr/src/debug/ltp/20240129/include/tst_fuzzy_sync.h:295: TINFO: end_b - start_b  : { avg =  9822ns, avg_dev =   490ns, dev_ratio = 0.05 }
/usr/src/debug/ltp/20240129/include/tst_fuzzy_sync.h:295: TINFO: end_a - end_b    : { avg = 121121184ns, avg_dev = 7067169ns, dev_ratio = 0.06 }
/usr/src/debug/ltp/20240129/include/tst_fuzzy_sync.h:295: TINFO: spins            : { avg = 41647532  , avg_dev = 2430690  , dev_ratio = 0.06 }
/usr/src/debug/ltp/20240129/include/tst_fuzzy_sync.h:648: TINFO: Exceeded execution time, requesting exit
pty03.c:134: TPASS: Did not crash with SLIP TTY discipline
pty03.c:108: TINFO: Creating PTY with Async PPP line discipline
/usr/src/debug/ltp/20240129/include/tst_fuzzy_sync.h:484: TINFO: Minimum sampling period ended
/usr/src/debug/ltp/20240129/include/tst_fuzzy_sync.h:307: TINFO: loop = 20, delay_bias = 0
/usr/src/debug/ltp/20240129/include/tst_fuzzy_sync.h:295: TINFO: start_a - start_b: { avg = -77074ns, avg_dev = 423195ns, dev_ratio = 5.49 }
/usr/src/debug/ltp/20240129/include/tst_fuzzy_sync.h:295: TINFO: end_a - start_a  : { avg = 127755ns, avg_dev = 672625ns, dev_ratio = 5.26 }
/usr/src/debug/ltp/20240129/include/tst_fuzzy_sync.h:295: TINFO: end_b - start_b  : { avg =  6313ns, avg_dev =   277ns, dev_ratio = 0.04 }
/usr/src/debug/ltp/20240129/include/tst_fuzzy_sync.h:295: TINFO: end_a - end_b    : { avg = 44368ns, avg_dev = 249317ns, dev_ratio = 5.62 }
/usr/src/debug/ltp/20240129/include/tst_fuzzy_sync.h:295: TINFO: spins            : { avg = 15971  , avg_dev = 85800  , dev_ratio = 5.37 }
/usr/src/debug/ltp/20240129/include/tst_fuzzy_sync.h:494: TINFO: Reached deviation ratios < 0.10, introducing randomness
/usr/src/debug/ltp/20240129/include/tst_fuzzy_sync.h:497: TINFO: Delay range is [-2166, 1830]
/usr/src/debug/ltp/20240129/include/tst_fuzzy_sync.h:307: TINFO: loop = 859, delay_bias = 0
/usr/src/debug/ltp/20240129/include/tst_fuzzy_sync.h:295: TINFO: start_a - start_b: { avg =  -116ns, avg_dev =    10ns, dev_ratio = 0.08 }
/usr/src/debug/ltp/20240129/include/tst_fuzzy_sync.h:295: TINFO: end_a - start_a  : { avg =  5329ns, avg_dev =   121ns, dev_ratio = 0.02 }
/usr/src/debug/ltp/20240129/include/tst_fuzzy_sync.h:295: TINFO: end_b - start_b  : { avg =  6308ns, avg_dev =   136ns, dev_ratio = 0.02 }
/usr/src/debug/ltp/20240129/include/tst_fuzzy_sync.h:295: TINFO: end_a - end_b    : { avg = -1095ns, avg_dev =    94ns, dev_ratio = 0.09 }
/usr/src/debug/ltp/20240129/include/tst_fuzzy_sync.h:295: TINFO: spins            : { avg =   376  , avg_dev =    31  , dev_ratio = 0.08 }


^CSending SIGKILL to test process...

^CSending SIGKILL to test process...
^CSending SIGKILL to test process...
^CSending SIGKILL to test process...

 

Steps to Reproduce

/lpg-build/cdc/fast_prod/WRL10_24/WRL10_24_GIT/wrlinux-10/setup.sh --machines marvell-cn10xxx --templates feature/docker --distros wrlinux --dl-layers=1 --accept-eula=yes
source environment-setup-x86_64-wrlinuxsdk-linux
source oe-init-build-env build
echo 'PREFERRED_PROVIDER_virtual/kernel = "linux-yocto-rt"' >> conf/local.conf
echo 'BB_NUMBER_THREADS ?= "24"' >> conf/local.conf
echo 'PARALLEL_MAKE ?= "-j 24"' >> conf/local.conf
echo 'BBMASK += "wrlinux/recipes-extended/windriver-ltp/ltp_%.bbappend"' >> conf/local.conf
bitbake-layers add-layer /lpg-build/cdc/WASSP_LINUX_1024/testcases/wrlinux/wr-testing/kts-dev
cd /lpg-build/cdc/WASSP_LINUX_1024/testcases/wrlinux/wr-testing/kts-dev/tools && ./gen_kernel_plan.py -s ltp -b marvell-cn10xxx -k preempt-rt -a aarch64 -p $BUILDDIR ; cd - && cp ltp.ini test_plan.list

#####To Clone a whole new testcases layer#####
git clone --depth 1 -b master git://lxgit.wrs.com/wrlinux-testing/testcases.git ../layers/testcases/wrlinux/
bitbake-layers add-layer ../layers/testcases/wrlinux/wr-testing/kts-dev
cd ../layers/testcases/wrlinux/wr-testing/kts-dev/tools && ./gen_kernel_plan.py -s ltp -b marvell-cn10xxx -k preempt-rt -a aarch64 -p $BUILDDIR ; cd - && cp ltp.ini test_plan.list
#####End#####

echo 'IMAGE_FSTYPES += "tar.bz2"' >> conf/local.conf
echo 'IMAGE_FSTYPES:remove = " live hddimg iso"' >> conf/local.conf
echo 'require templates/feature/ltp/template.conf' >> conf/local.conf
bitbake wrlinux-image-std

share image:
http://pek-lpgtest7408.wrs.com/buildarea1/SharedImage/LTS24/LTP/marvell-cn10xxx_preempt-rt_glibc-std/20240706_161654/