Fixed
Created: Aug 18, 2021
Updated: Aug 23, 2021
Resolved Date: Aug 23, 2021
Found In Version: 10.21.20.4
Fix Version: 10.21.20.4
Severity: Standard
Applicable for: Wind River Linux LTS 21
Component/s: BSP
Switching to timer-based delay loop, resolution 3ns
clocksource: arm,sp804: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 9556302233 ns
Console: colour dummy device 80x30
Calibrating delay loop (skipped), value calculated using timer frequency.. 512.00 BogoMIPS (lpj=2560000)
pid_max: default: 32768 minimum: 301
LSM: Security Framework initializing
Mount-cache hash table entries: 2048 (order: 1, 8192 bytes, linear)
Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes, linear)
CPU: Testing write buffer coherency: ok
CPU0: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable
CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
check_fixup_sev: Cross-cluster SEV fixup: yes
Setting up static identity map for 0x600000 - 0x600060
rcu: Hierarchical SRCU implementation.
Set up fault handler for Axxia 5500
smp: Bringing up secondary CPUs ...
CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
CPU1: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable
CPU2: thread -1, cpu 2, socket 0, mpidr 80000002
CPU2: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable
CPU3: thread -1, cpu 3, socket 0, mpidr 80000003
CPU3: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable
CPU4: thread -1, cpu 0, socket 1, mpidr 80000100
CPU4: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable
CPU5: thread -1, cpu 1, socket 1, mpidr 80000101
CPU5: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable
CPU6: thread -1, cpu 2, socket 1, mpidr 80000102
CPU6: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable
CPU7: thread -1, cpu 3, socket 1, mpidr 80000103
CPU7: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable
CPU8: thread -1, cpu 0, socket 2, mpidr 80000200
CPU8: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable
CPU9: thread -1, cpu 1, socket 2, mpidr 80000201
CPU9: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable
CPU10: thread -1, cpu 2, socket 2, mpidr 80000202
CPU10: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable
CPU11: thread -1, cpu 3, socket 2, mpidr 80000203
CPU11: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable
CPU12: thread -1, cpu 0, socket 3, mpidr 80000300
CPU12: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable
CPU13: thread -1, cpu 1, socket 3, mpidr 80000301
CPU13: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable
CPU14: thread -1, cpu 2, socket 3, mpidr 80000302
CPU14: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable
CPU15: thread -1, cpu 3, socket 3, mpidr 80000303
CPU15: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable
smp: Brought up 1 node, 16 CPUs
SMP: Total of 16 processors activated (8192.00 BogoMIPS).
CPU: All CPU(s) started in SVC mode.
To Get The Testing Layer:
------------------------
# git clone ssh://git@lxgit.wrs.com/wrlinux-testing/testcases
# cd wrlinux;git checkout WRLINUX_10_21_HEAD
Project Build:
----------------------
--machines=axxiaarm64 --templates feature/docker feature/kexec feature/kdump --distro wrlinux --dl-layers
Build Steps:
. oe-init-build-env
Add BTS layer
1.bitbake-layers add-layer <path to wr-testing/bts-dev>
2.echo "require templates/feature/bts/template.conf" >> conf/local.conf
3.echo 'PREFERRED_PROVIDER_virtual/kernel = "linux-yocto"' >> conf/local.conf
build image:
# bitbake wrlinux-image-std